P No. Bot Connect to Mode0 Mode 1 Mode 2 Mode 3 Mode 4 Mode 5 Mode 6 Mode 7
8 25 U7 eMMC DAT0(VDD_3V3B PU) gpmc_ad0 mmc1_dat0_mux2 - - - - - gpio1[0]
8 24 V7 eMMC DAT1(VDD_3V3B PU) gpmc_ad1 mmc1_dat1_mux2 - - - - - gpio1[1]
8 5 R8 eMMC DAT2(VDD_3V3B PU) gpmc_ad2 mmc1_dat2_mux2 - - - - - gpio1[2]
8 6 T8 eMMC DAT3(VDD_3V3B PU) gpmc_ad3 mmc1_dat3_mux2 - - - - - gpio1[3]
8 23 U8 eMMC DAT4(VDD_3V3B PU) gpmc_ad4 mmc1_dat4_mux2 - - - - - gpio1[4]
8 22 V8 eMMC DAT5(VDD_3V3B PU) gpmc_ad5 mmc1_dat5_mux2 - - - - - gpio1[5]
8 3 R9 eMMC DAT6(VDD_3V3B PU) gpmc_ad6 mmc1_dat6_mux2 - - - - - gpio1[6]
8 4 T9 eMMC DAT7(VDD_3V3B PU) gpmc_ad7 mmc1_dat7_mux2 - - - - - gpio1[7]
8 19 U10 - gpmc_ad8 lcd_data23 mmc1_dat0_mux0 mmc2_dat4_mux1 ehrpwm2A_mux1 pr1_mii_mt0_clk_mux0 - gpio0[22]
8 13 T10 - gpmc_ad9 lcd_data22 mmc1_dat1_mux0 mmc2_dat5_mux1 ehrpwm2B_mux1 pr1_mii0_col - gpio0[23]
8 14 T11 - gpmc_ad10 lcd_data21 mmc1_dat2_mux0 mmc2_dat6_mux1 ehrpwm2_tripzone_input_mux1 pr1_mii0_txen_mux0 - gpio0[26]
8 17 U12 - gpmc_ad11 lcd_data20 mmc1_dat3_mux0 mmc2_dat7_mux1 ehrpwm0_synco_mux2 pr1_mii0_txd3_mux0 - gpio0[27]
8 12 T12 - gpmc_ad12 lcd_data19 mmc1_dat4_mux0 mmc2_dat0_mux1 eQEP2A_in_mux1 pr1_mii0_txd2_mux0 pr1_pru0_pru_r30[14] gpio1[12]
8 11 R12 - gpmc_ad13 lcd_data18 mmc1_dat5_mux0 mmc2_dat1_mux1 eQEP2B_in_mux1 pr1_mii0_txd1_mux0 pr1_pru0_pru_r30[15] gpio1[13]
8 16 V13 - gpmc_ad14 lcd_data17 mmc1_dat6_mux0 mmc2_dat2_mux1 eQEP2_index_mux1 pr1_mii0_txd0_mux0 pr1_pru0_pru_r31[14] gpio1[14]
8 15 U13 - gpmc_ad15 lcd_data16 mmc1_dat7_mux0 mmc2_dat3_mux1 eQEP2_strobe_mux1 pr1_ecap0_ecap_capin_apwm_o_mux0 pr1_pru0_pru_r31[15] gpio1[15]
9 15? R13 T13(P9-15 is shared PIN) gpmc_a0_mux0 gmii2_txen rgmii2_tctl rmii2_txen gpmc_a16_mux0 pr1_mii_mt1_clk ehrpwm1_tripzone_input_mux1 gpio1[16]
9 23 V14 - gpmc_a1_mux0 gmii2_rxdv rgmii2_rctl mmc2_dat0_mux0 gpmc_a17_mux0 pr1_mii1_txd3 ehrpwm0_synco_mux3 gpio1[17]
9 14 U14 - gpmc_a2_mux0 gmii2_txd3 rgmii2_td3 mmc2_dat1_mux0 gpmc_a18_mux0 pr1_mii1_txd2 ehrpwm1A_mux1 gpio1[18]
9 16 T14 - gpmc_a3_mux0 gmii2_txd2 rgmii2_td2 mmc2_dat2_mux0 gpmc_a19_mux0 pr1_mii1_txd1 ehrpwm1B_mux1 gpio1[19]
　 　 R14 eMMC RST(via INV, VDD_3V3B PU) gpmc_a4_mux0 gmii2_txd1 rgmii2_td1 rmii2_txd1 gpmc_a20_mux0 pr1_mii1_txd0 eQEP1A_in_mux1 gpio1[20]
　 　 V15 LED USR0(PD, High Active) gpmc_a5_mux0 gmii2_txd0 rgmii2_td0 rmii2_txd0 gpmc_a21_mux0 pr1_mii1_rxd3 eQEP1B_in_mux1 gpio1[21]
　 　 U15 LED USR1(PD, High Active) gpmc_a6_mux0 gmii2_txclk rgmii2_tclk mmc2_dat4_mux0 gpmc_a22_mux0 pr1_mii1_rxd2 eQEP1_index_mux1 gpio1[22]
　 　 T15 LED USR2(PD, High Active) gpmc_a7_mux0 gmii2_rxclk rgmii2_rclk mmc2_dat5_mux0 gpmc_a23_mux0 pr1_mii1_rxd1 eQEP1_strobe_mux1 gpio1[23]
　 　 V16 LED USR3(PD, High Active) gpmc_a8_mux0 gmii2_rxd3 rgmii2_rd3 mmc2_dat6_mux0 gpmc_a24_mux0 pr1_mii1_rxd0 mcasp0_aclkx_mux3 gpio1[24]
　 　 U16 TDA19988 INT(VDD_3V3B PU) gpmc_a9_mux0 gmii2_rxd2 rgmii2_rd2 mmc2_dat7_mux0/rmii2_crs_dv_mux2 gpmc_a25_mux0 pr1_mii_mr1_clk mcasp0_fsx_mux3 gpio1[25]
　 　 T16 TPS2051 OC(VDD_3V3A PU) gpmc_a10_mux0 gmii2_rxd1 rgmii2_rd1 rmii2_rxd1 gpmc_a26 pr1_mii1_rxdv mcasp0_axr0_mux3 gpio1[26]
　 　 V17 24.576MHz oscillator OE gpmc_a11_mux0 gmii2_rxd0 rgmii2_rd0 rmii2_rxd0 gpmc_a27 pr1_mii1_rxer mcasp0_axr1_mux3 gpio1[27]
9 11 T17 - gpmc_wait0 gmii2_crs gpmc_csn4 rmii2_crs_dv_mux0 mmc1_sdcd_mux0 pr1_mii1_col uart4_rxd_mux2 gpio0[30]
9 13 U17 - gpmc_wpn gmii2_rxer gpmc_csn5 rmii2_rxer mmc2_sdcd_mux0 pr1_mii1_txen uart4_txd_mux2 gpio0[31]
9 12 U18 - gpmc_be1n_mux0 gmii2_col gpmc_csn6 mmc2_dat3_mux0 gpmc_dir pr1_mii1_rxlink mcasp0_aclkr_mux3 gpio1[28]
8 26 V6 - gpmc_csn0 - - - - - - gpio1[29]
8 21 U9 eMMC CLK(VDD_3V3B PU) gpmc_csn1 gpmc_clk_mux1 mmc1_clk_mux0 pr1_edio_data_in6_mux0 pr1_edio_data_out6_mux0 pr1_pru1_pru_r30[12] pr1_pru1_pru_r31[12] gpio1[30]
8 20 V9 eMMC CMD(VDD_3V3B PU) gpmc_csn2 gpmc_be1n_mux1 mmc1_cmd_mux0 pr1_edio_data_in7_mux0 pr1_edio_data_out7_mux0 pr1_pru1_pru_r30[13] pr1_pru1_pru_r31[13] gpio1[31]
9 15? T13 R13(P9-15 is shared PIN) gpmc_csn3 gpmc_a3_mux2 rmii2_crs_dv_mux1 mmc2_cmd_mux0 pr1_mii0_crs_mux0 pr1_mdio_data EMU4_mux0 gpio2[0]
8 18 V12 - gpmc_clk_mux0 lcd_memory_clk_mux0 gpmc_wait1 mmc2_clk_mux0 pr1_mii1_crs_mux0 pr1_mdio_mdclk mcasp0_fsr_mux3 gpio2[1]
8 7 R7 - gpmc_advn_ale - timer4_mux3 - - - - gpio2[2]
8 8 T7 - gpmc_oen_ren - timer7_mux3 - - - - gpio2[3]
8 10 U6 - gpmc_wen - timer6_mux3 - - - - gpio2[4]
8 9 T6 - gpmc_be0n_cle - timer5_mux3 - - - - gpio2[5]
8 45 R1 TDA19988 VPC3(VDD_3V3B PU) lcd_data0 gpmc_a0_mux1 pr1_mii_mt0_clk_mux1 ehrpwm2A_mux0 - pr1_pru1_pru_r30[0] pr1_pru1_pru_r31[0] gpio2[6]
8 46 R2 TDA19988 VPC4(VDD_3V3B PU) lcd_data1 gpmc_a1_mux1 pr1_mii0_txen_mux1 ehrpwm2B_mux0 - pr1_pru1_pru_r30[1] pr1_pru1_pru_r31[1] gpio2[7]
8 43 R3 TDA19988 VPC5(VDD_3V3B PU) lcd_data2 gpmc_a2_mux1 pr1_mii0_txd3_mux1 ehrpwm2_tripzone_input_mux0 - pr1_pru1_pru_r30[2] pr1_pru1_pru_r31[2] gpio2[8]
8 44 R4 TDA19988 VPC6(VDD_3V3B PU) lcd_data3 gpmc_a3_mux1 pr1_mii0_txd2_mux1 ehrpwm0_synco_mux1 - pr1_pru1_pru_r30[3] pr1_pru1_pru_r31[3] gpio2[9]
8 41 T1 TDA19988 VPC7(VDD_3V3B PU) lcd_data4 gpmc_a4_mux1 pr1_mii0_txd1_mux1 eQEP2A_in_mux0 - pr1_pru1_pru_r30[4] pr1_pru1_pru_r31[4] gpio2[10]
8 42 T2 TDA19988 VPB2(VDD_3V3B PU) lcd_data5 gpmc_a5_mux1 pr1_mii0_txd0_mux1 eQEP2B_in_mux0 - pr1_pru1_pru_r30[5] pr1_pru1_pru_r31[5] gpio2[11]
8 39 T3 TDA19988 VPB3(VDD_3V3B PU) lcd_data6 gpmc_a6_mux1 pr1_edio_data_in6_mux1 eQEP2_index_mux0 pr1_edio_data_out6_mux1 pr1_pru1_pru_r30[6] pr1_pru1_pru_r31[6] gpio2[12]
8 40 T4 TDA19988 VPB4(VDD_3V3B PU) lcd_data7 gpmc_a7_mux1 pr1_edio_data_in7_mux1 eQEP2_strobe_mux0 pr1_edio_data_out7_mux1 pr1_pru1_pru_r30[7] pr1_pru1_pru_r31[7] gpio2[13]
8 37 U1 TDA19988 VPB5(VDD_3V3B PU) lcd_data8 gpmc_a12 ehrpwm1_tripzone_input_mux0 mcasp0_aclkx_mux1 uart5_txd_mux2 pr1_mii0_rxd3 uart2_ctsn_mux1 gpio2[14]
8 38 U2 TDA19988 VPB6(VDD_3V3B PU) lcd_data9 gpmc_a13 ehrpwm0_synco_mux0 mcasp0_fsx_mux1 uart5_rxd_mux2 pr1_mii0_rxd2 uart2_rtsn_mux1 gpio2[15]
8 36 U3 TDA19988 VPB7(VDD_3V3B PU) lcd_data10 gpmc_a14 ehrpwm1A_mux0 mcasp0_axr0_mux1 - pr1_mii0_rxd1 uart3_ctsn_mux1 gpio2[16]
8 34 U4 TDA19988 VPA3(VDD_3V3B PU) lcd_data11 gpmc_a15 ehrpwm1B_mux0 mcasp0_ahclkr_mux1 mcasp0_axr2_mux2 pr1_mii0_rxd0 uart3_rtsn_mux1 gpio2[17]
8 35 V2 TDA19988 VPA4(VDD_3V3B PU) lcd_data12 gpmc_a16_mux1 eQEP1A_in_mux0 mcasp0_aclkr_mux1 mcasp0_axr2_mux3 pr1_mii0_rxlink uart4_ctsn_mux1 gpio0[8]
8 33 V3 TDA19988 VPA5(VDD_3V3B PU) lcd_data13 gpmc_a17_mux1 eQEP1B_in_mux0 mcasp0_fsr_mux1 mcasp0_axr3_mux3 pr1_mii0_rxer uart4_rtsn_mux1 gpio0[9]
8 31 V4 TDA19988 VPA6(VDD_3V3B PU) lcd_data14 gpmc_a18_mux1 eQEP1_index_mux0 mcasp0_axr1_mux1 uart5_rxd_mux1 pr1_mii_mr0_clk uart5_ctsn_mux1 gpio0[10]
8 32 T5 TDA19988 VPA7(VDD_3V3B PU) lcd_data15 gpmc_a19_mux1 eQEP1_strobe_mux0 mcasp0_ahclkx_mux1 mcasp0_axr3_mux2 pr1_mii0_rxdv uart5_rtsn_mux1 gpio0[11]
8 27 U5 TDA19988 VSYNC/VREF lcd_vsync gpmc_a8_mux1 gpmc_a1_mux2 pr1_edio_data_in2 pr1_edio_data_out2 pr1_pru1_pru_r30[8] pr1_pru1_pru_r31[8] gpio2[22]
8 29 R5 TDA19988 HSYNC/VREF lcd_hsync gpmc_a9_mux1 gpmc_a2_mux2 pr1_edio_data_in3 pr1_edio_data_out3 pr1_pru1_pru_r30[9] pr1_pru1_pru_r31[9] gpio2[23]
8 28 V5 TDA19988 PSYNC lcd_pclk gpmc_a10_mux1 pr1_mii0_crs_mux1 pr1_edio_data_in4 pr1_edio_data_out4 pr1_pru1_pru_r30[10] pr1_pru1_pru_r31[10] gpio2[24]
8 30 R6 TDA19988 DE/VREF lcd_ac_bias_en gpmc_a11_mux1 pr1_mii1_crs_mux1 pr1_edio_data_in5 pr1_edio_data_out5 pr1_pru1_pru_r30[11] pr1_pru1_pru_r31[11] gpio2[25]
　 　 F17 microSD DAT3(VDD_3V3B PU) mmc0_dat3 gpmc_a20_mux1 uart4_ctsn_mux0 timer5_mux0 uart1_dcdn_mux1 pr1_pru0_pru_r30[8] pr1_pru0_pru_r31[8] gpio2[26]
　 　 F18 microSD CD/DAT2(VDD_3V3B PU) mmc0_dat2 gpmc_a21_mux1 uart4_rtsn_mux0 timer6_mux0 uart1_dsrn_mux1 pr1_pru0_pru_r30[9] pr1_pru0_pru_r31[9] gpio2[27]
　 　 G15 microSD DAT1(VDD_3V3B PU) mmc0_dat1 gpmc_a22_mux1 uart5_ctsn_mux0 uart3_rxd_mux2 uart1_dtrn_mux1 pr1_pru0_pru_r30[10] pr1_pru0_pru_r31[10] gpio2[28]
　 　 G16 microSD DAT0(VDD_3V3B PU) mmc0_dat0 gpmc_a23_mux1 uart5_rtsn_mux0 uart3_txd_mux2 uart1_rin_mux1 pr1_pru0_pru_r30[11] pr1_pru0_pru_r31[11] gpio2[29]
　 　 G17 microSD CLK(VDD_3V3B PU) mmc0_clk gpmc_a24_mux1 uart3_ctsn_mux0 uart2_rxd_mux2 dcan1_tx_mux2 pr1_pru0_pru_r30[12] pr1_pru0_pru_r31[12] gpio2[30]
　 　 G18 microSD CMD(VDD_3V3B PU) mmc0_cmd gpmc_a25_mux1 uart3_rtsn_mux0 uart2_txd_mux2 dcan1_rx_mux2 pr1_pru0_pru_r30[13] pr1_pru0_pru_r31[13] gpio2[31]
　 　 H16 LAN8710A COL/CRS_DV/MODE2 gmii1_col rmii2_refclk spi1_sclk_mux1 uart5_rxd_mux0 mcasp1_axr2_mux1 mmc2_dat3_mux2 mcasp0_axr2_mux4 gpio3[0]
　 　 H17 LAN8710A CRS gmii1_crs rmii1_crs_dv spi1_d0_mux1 I2C1_SDA_mux0 mcasp1_aclkx_mux1 uart5_ctsn_mux2 uart2_rxd_mux1 gpio3[1]
　 　 J15 LAN8710A RXER/RXD4/PHY AD0 gmii1_rxer rmii1_rxer spi1_d1_mux1 I2C1_SCL_mux0 mcasp1_fsx_mux1 uart5_rtsn_mux2 uart2_txd_mux1 gpio3[2]
　 　 J16 LAN8710A TXEN gmii1_txen rmii1_txen rgmii1_tctl timer4_mux0 mcasp1_axr0_mux1 eQEP0_index_mux1 mmc2_cmd_mux2 gpio3[3]
　 　 J17 LAN8710A RXDV gmii1_rxdv lcd_memory_clk_mux1 rgmii1_rctl uart5_txd_mux1 mcasp1_aclkx_mux0 mmc2_dat0_mux2 mcasp0_aclkr_mux2 gpio3[4]
　 　 J18 LAN8710A TXD3 gmii1_txd3 dcan0_tx_mux0 rgmii1_td3 uart4_rxd_mux0 mcasp1_fsx_mux0 mmc2_dat1_mux2 mcasp0_fsr_mux2 gpio0[16]
　 　 K15 LAN8710A TXD2 gmii1_txd2 dcan0_rx_mux0 rgmii1_td2 uart4_txd_mux0 mcasp1_axr0_mux0 mmc2_dat2_mux2 mcasp0_ahclkx_mux2 gpio0[17]
　 　 K16 LAN8710A TXD1 gmii1_txd1 rmii1_txd1 rgmii1_td1 mcasp1_fsr_mux1 mcasp1_axr1_mux0 eQEP0A_in_mux1 mmc1_cmd_mux1 gpio0[21]
　 　 K17 LAN8710A TXD0 gmii1_txd0 rmii1_txd0 rgmii1_td0 mcasp1_axr2_mux0 mcasp1_aclkr_mux0 eQEP0B_in_mux1 mmc1_clk_mux1 gpio0[28]
　 　 K18 LAN8710A TXCLK gmii1_txclk uart2_rxd_mux0 rgmii1_tclk mmc0_dat7 mmc1_dat0_mux1 uart1_dcdn_mux0 mcasp0_aclkx_mux2 gpio3[9]
　 　 L18 LAN8710A RXCLK/PHY AD1 gmii1_rxclk uart2_txd_mux0 rgmii1_rclk mmc0_dat6 mmc1_dat1_mux1 uart1_dsrn_mux0 mcasp0_fsx_mux2 gpio3[10]
　 　 L17 LAN8710A RXD 3/PHYAD2 gmii1_rxd3 uart3_rxd_mux0 rgmii1_rd3 mmc0_dat5 mmc1_dat2_mux1 uart1_dtrn_mux0 mcasp0_axr0_mux2 gpio2[18]
　 　 L16 LAN8710A RXD 2/RMISEL gmii1_rxd2 uart3_txd_mux0 rgmii1_rd2 mmc0_dat4 mmc1_dat3_mux1 uart1_rin_mux0 mcasp0_axr1_mux2 gpio2[19]
　 　 L15 LAN8710A RXD 1/MODE1 gmii1_rxd1 rmii1_rxd1 rgmii1_rd1 mcasp1_axr3_mux0 mcasp1_fsr_mux0 eQEP0_strobe_mux1 mmc2_clk_mux2 gpio2[20]
　 　 M16 LAN8710A RXD 0/MODE0 gmii1_rxd0 rmii1_rxd0 rgmii1_rd0 mcasp1_ahclkx_mux0 mcasp1_ahclkr_mux0 mcasp1_aclkr_mux1 mcasp0_axr3_mux4 gpio2[21]
　 　 H18 LAN8710A RXCLK/PHYAD1 rmii1_refclk xdma_event_intr2_mux0 spi1_cs0_mux1 uart5_txd_mux0 mcasp1_axr3_mux1 mmc0_pow_mux0 mcasp1_ahclkx_mux1 gpio0[29]
　 　 M17 LAN8710A MDIO(VDD_3V3B PU) mdio_data timer6_mux2 uart5_rxd_mux3 uart3_ctsn_mux2 mmc0_sdcd_mux2 mmc1_cmd_mux2 mmc2_cmd_mux1 gpio0[0]
　 　 M18 LAN8710A MDC mdio_clk timer5_mux2 uart5_txd_mux3 uart3_rtsn_mux2 mmc0_sdwp_mux2 mmc1_clk_mux2 mmc2_clk_mux1 gpio0[1]
9 22 A17 - spi0_sclk uart2_rxd_mux3 I2C2_SDA_mux2 ehrpwm0A_mux1 pr1_uart0_cts_n_mux0 pr1_edio_sof EMU2_mux1 gpio0[2]
9 21 B17 - spi0_d0 uart2_txd_mux3 I2C2_SCL_mux2 ehrpwm0B_mux1 pr1_uart0_rts_n_mux0 pr1_edio_latch_in EMU3_mux1 gpio0[3]
9 18 B16 - spi0_d1 mmc1_sdwp_mux0 I2C1_SDA_mux3 ehrpwm0_tripzone_input_mux1 pr1_uart0_rxd_mux0 pr1_edio_data_in0 pr1_edio_data_out0 gpio0[4]
9 17 A16 - spi0_cs0 mmc2_sdwp_mux0 I2C1_SCL_mux3 ehrpwm0_synci_mux1 pr1_uart0_txd_mux0 pr1_edio_data_in1 pr1_edio_data_out1 gpio0[5]
　 　 C15 microSD CD(VDD_3V3B PU) spi0_cs1 uart3_rxd_mux1 eCAP1_in_PWM1_out_mux0 mmc0_pow_mux1 xdma_event_intr2_mux1 mmc0_sdcd_mux0 EMU4_mux1 gpio0[6]
9 42@ C18 B12(P-42 is shared PIN) eCAP0_in_PWM0_out uart3_txd_mux1 spi1_cs1_mux1 pr1_ecap0_ecap_capin_apwm_o_mux1 spi1_sclk_mux0 mmc0_sdwp_mux0 xdma_event_intr2_mux2 gpio0[7]
　 　 E18 (NC) uart0_ctsn uart4_rxd_mux1 dcan1_tx_mux0 I2C1_SDA_mux1 spi1_d0_mux0 timer7_mux0 pr1_edc_sync0_out gpio0[8]
　 　 E17 TP9 uart0_rtsn uart4_txd_mux1 dcan1_rx_mux0 I2C1_SCL_mux1 spi1_d1_mux0 spi1_cs0_mux2 pr1_edc_sync1_out gpio0[9]
　 　 E15 UART0 PIN RXD uart0_rxd spi1_cs0_mux3 dcan0_tx_mux1 I2C2_SDA_mux1 eCAP2_in_PWM2_out_mux0 pr1_pru1_pru_r30[14] pr1_pru1_pru_r31[14] gpio0[10]
　 　 E16 UART0 PIN TXD uart0_txd spi1_cs1_mux3 dcan0_rx_mux1 I2C2_SCL_mux1 eCAP1_in_PWM1_out_mux1 pr1_pru1_pru_r30[15] pr1_pru1_pru_r31[15] gpio0[11]
9 20 D18 - uart1_ctsn timer6_mux1 dcan0_tx_mux2 I2C2_SDA_mux0 spi1_cs0_mux0 pr1_uart0_cts_n_mux1 pr1_edc_latch0_in gpio0[12]
9 19 D17 - uart1_rtsn timer5_mux1 dcan0_rx_mux2 I2C2_SCL_mux0 spi1_cs1_mux0 pr1_uart0_rts_n_mux1 pr1_edc_latch1_in gpio0[13]
9 26 D16 - uart1_rxd mmc1_sdwp_mux1 dcan1_tx_mux1 I2C1_SDA_mux2 - pr1_uart0_rxd_mux1 pr1_pru1_pru_r31[16] gpio0[14]
9 24 D15 - uart1_txd mmc2_sdwp_mux1 dcan1_rx_mux1 I2C1_SCL_mux2 - pr1_uart0_txd_mux1 pr1_pru0_pru_r31[16] gpio0[15]
　 　 C17 EEPROM SDA/TDA19988 CSDA I2C0_SDA timer4_mux2 uart2_ctsn_mux0 eCAP2_in_PWM2_out_mux2 - - - gpio3[5]
　 　 C16 EEPROM SCL/TDA19988 CSCL I2C0_SCL timer7_mux2 uart2_rtsn_mux0 eCAP1_in_PWM1_out_mux2 - - - gpio3[6]
9 31 A13 TDA19988 ACLK mcasp0_aclkx_mux0 ehrpwm0A_mux0 - spi1_sclk_mux2 mmc0_sdcd_mux1 pr1_pru0_pru_r30[0] pr1_pru0_pru_r31[0] gpio3[14]
9 29 B13 TDA19988 AP0 mcasp0_fsx_mux0 ehrpwm0B_mux0 - spi1_d0_mux2 mmc1_sdcd_mux1 pr1_pru0_pru_r30[1] pr1_pru0_pru_r31[1] gpio3[15]
9 30 D12 - mcasp0_axr0_mux0 ehrpwm0_tripzone_input_mux0 - spi1_d1_mux2 mmc2_sdcd_mux1 pr1_pru0_pru_r30[2] pr1_pru0_pru_r31[2] gpio3[16]
9 28 C12 TDA19988 AP1 mcasp0_ahclkr_mux0 ehrpwm0_synci_mux0 mcasp0_axr2_mux0 spi1_cs0_mux4 eCAP2_in_PWM2_out_mux1 pr1_pru0_pru_r30[3] pr1_pru0_pru_r31[3] gpio3[17]
9 42@ B12 C18(P-42 is shared PIN) mcasp0_aclkr_mux0 eQEP0A_in_mux0 mcasp0_axr2_mux1 mcasp1_aclkx_mux2 mmc0_sdwp_mux1 pr1_pru0_pru_r30[4] pr1_pru0_pru_r31[4] gpio3[18]
9 27 C13 - mcasp0_fsr_mux0 eQEP0B_in_mux0 mcasp0_axr3_mux1 mcasp1_fsx_mux2 EMU2_mux2 pr1_pru0_pru_r30[5] pr1_pru0_pru_r31[5] gpio3[19]
9 41# D13 D14 mcasp0_axr1_mux0 eQEP0_index_mux0 - mcasp1_axr0_mux2 EMU3_mux2 pr1_pru0_pru_r30[6] pr1_pru0_pru_r31[6] gpio3[20]
9 25 A14 24.576MHz oscillator CLK mcasp0_ahclkx_mux0 eQEP0_strobe_mux0 mcasp0_axr3_mux0 mcasp1_axr1_mux1 EMU4_mux2 pr1_pru0_pru_r30[7] pr1_pru0_pru_r31[7] gpio3[21]
　 　 A15 D-FF CLK xdma_event_intr0 - timer4_mux1 clkout1 spi1_cs1_mux2 pr1_pru1_pru_r31[16] EMU2_mux0 gpio0[19]
9 41＃ D14 D13(P-41 is shared PIN) xdma_event_intr1 - tclkin clkout2 timer7_mux1 pr1_pru0_pru_r31[16] EMU3_mux0 gpio0[20]
9 10 A10 RESET SW/PGOOD(VDD3V3A PU) nRESETIN_OUT - - - - - - -
　 　 B18 TPS65217C INT nNMI - - - - - - -
　 　 C11 JTAG_TMS(Land) TMS - - - - - - -
　 　 B11 JTAG_TDI(Land) TDI - - - - - - -
　 　 A11 JTAG_TDO(Land) TDO - - - - - - -
　 　 A12 JTAG_TCK(Land) TCK - - - - - - -
　 　 B10 JTAG_TRSTn(Terminal Land) nTRST - - - - - - -
　 　 C14 JTAG_EMU0(Land) EMU0 - - - - - - gpio3[7]
　 　 B14 JTAG_EMU1(Land) EMU1 - - - - - - gpio3[8]
　 　 B5 TPS65217C LDO_PGOOD RTC_porz - - - - - - -
　 　 C6 TPS65217C PWR_EN PMIC_POWER_EN - - - - - - -
　 　 C5 TPS65217C WAKEUP(VRTC PU) EXT_WAKEUP - - - - - - -
　 　 B4 (PD) ENZ_KALDO_1P8V - - - - - - -
　 　 F16 (NC) USB0_DRVVBUS - - - - - - gpio0[18]
　 　 F15 (NC) USB1_DRVVBUS - - - - - - gpio3[13]